1/9 not for new design november 2000 this is information on a product still in production but not recommended for new designs. M2716 nmos 16 kbit (2kb x 8) uv eprom 2048 x 8 organization 525mw max active power, 132mw max standby power access time: C M2716-1 is 350ns C M2716 is 450ns single 5v supply voltage static-no clocks required inputs and outputs ttl compatible during both read and program modes three-state output with tied-or- capability extended temperature range programming voltage: 25v description the M2716 is a 16,384 bit uv erasable and elec- trically programmable memory eprom, ideally suited for applications where fast turn around and pattern experimentation are important require- ments. the M2716 is housed in a 24 pin window ceramic frit-seal dual-in-line package. the transparent lid allows the user to expose the chip to ultraviolet light to erase the bit pattern. a new pattern can then be written to the device by following the pro- gramming procedure. figure 1. logic diagram ai00784b 11 a0-a10 q0-q7 v cc M2716 g ep v ss 8 v pp 1 24 fdip24w (f)
q2 v ss a3 a0 q0 q1 a2 a1 g q5 a10 ep q3 v pp q7 q6 q4 a4 v cc a7 ai00785 M2716 8 1 2 3 4 5 6 7 9 10 11 12 20 19 18 17 16 15 a6 a5 a9 a8 23 22 21 14 13 24 figure 2. dip pin connections symbol parameter value unit t a ambient operating temperature grade 1 grade 6 0 to 70 C40 to 85 c t bias temperature under bias grade 1 grade 6 C10 to 80 C50 to 95 c t stg storage temperature C65 to 125 c v cc supply voltage C0.3 to 6 v v io input or output voltages C0.3 to 6 v v pp program supply C0.3 to 26.5 v p d power dissipation 1.5 w note: except for the rating "operating temperature range", stres ses above those listed in the table "absolute maximum ratings" may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions abov e those indicated in the operating sections of this specification is not implied. exposure to absolute maximum rating conditions for ex tended periods may affect device reliability. refer also to the stmicroelectronics sure program and other relevant quality documents. table 2. absolute maximum ratings device operation the M2716 has 3 modes of operation in the normal system environment. these are shown in table 3. read mode. the M2716 read operation requires that g = v il , ep = v il and that addresses a0-a10 have been stabilized. valid data will appear on the output pins after time t avqv , t glqv or t elqv (see switching time waveforms) depending on which is limiting. deselect mode . the M2716 is deselected by mak- ing g = v ih . this mode is independent of ep and the condition of the addresses. the outputs are hi-z when g = v ih . this allows tied-or of 2 or more M2716s for memory expansion. standby mode (power down) . the M2716 may be powered down to the standby mode by making ep = v ih . this is independent of g and automat- ically puts the outputs in the hi-z state. the power is reduced to 25% (132 mw max) of the normal operating power. v cc and v pp must be maintained at 5v. access time at power up remains either t avqv or t elqv (see switching time waveforms). programming the M2716 is shipped from sgs-thomson com- pletely erased. all bits will be at 1" level (output high) in this initial state and after any full erasure. table 3 shows the 3 programming modes. program mode . the M2716 is programmed by introducing 0"s into the desired locations. this is done 8 bits (a byte) at a time. any individual address, sequential addresses, or addresses chosen at ran- dom may be programmed. any or all of the 8 bits associated with an address location may be pro- grammed with a single program pulse applied to the ep pin. all input voltage levels including the program pulse on chip enable are ttl compatible. the programming sequence is: with v pp = 25v, v cc = 5v, g = v ih and ep = v il , an address is selected and the desired data word is applied to the output pins (v il = 0" and v ih = 1" for both address and data). after the address and data signals are stable the program pin is pulsed from v il to v ih with a M2716 2/9
pulse width between 45ms and 55ms. multiple pulses are not needed but will not cause device damage. no pins should be left open. a high level (v ih or higher) must not be maintained longer than t phpl (max) on the program pin during program- ming. M2716s may be programmed in parallel in this mode. program verify mode . the programming of the M2716 may be verified either one byte at a time during the programming (as shown in figure 6) or by reading all of the bytes out at the end of the programming sequence. this can be done with v pp = 25v or 5v in either case. v pp must be at 5v for all operating modes and can be maintained at 25v for all programming modes. program inhibit mode. the program inhibit mode allows several M2716s to be programmed simul- taneously with different data for each one by con- trolling which ones receive the program pulse. all similar inputs of the M2716 may be paralleled. pulsing the program pin (from v il to v ih ) will pro- gram a unit while inhibiting the program pulse to a unit will keep it from being programmed and keep- ing g = v ih will put its outputs in the hi-z state. erasure operation the M2716 is erased by exposure to high intensity ultraviolet light through the transparent window. this exposure discharges the floating gate to its initial state through induced photo current. it is recommended that the M2716 be kept out of direct sunlight. the uv content of sunlight may cause a partial erasure of some bits in a relatively short period of time. an ultraviolet source of 2537 ? yielding a total integrated dosage of 15 watt-seconds/cm 2 power rating is used. the M2716 to be erased should be placed 1 inch away from the lamp and no filters should be used. an erasure system should be calibrated peri- odically. the erasure time is increased by the square of the distance (if the distance is doubled the erasure time goes up by a factor of 4). lamps lose intensity as they age, it is therefore important to periodically check that the uv system is in good order. this will ensure that the eproms are being com- pletely erased. incomplete erasure will cause symptoms that can be misleading. programmers, components, and system designs have been erro- neously suspected when incomplete erasure was the basic problem. device operation (contd) mode ep gv pp q0 - q7 read v il v il v cc data out program v ih pulse v ih v pp data in verify v il v il v pp or v cc data out program inhibit v il v ih v pp hi-z deselect x v ih v cc hi-z standby v ih xv cc hi-z note: x = v ih or v il . table 3. operating modes M2716 3/9
ai00827 2.4v 0.45v 2.0v 0.8v figure 3. ac testing input output waveforms input rise and fall times 20ns input pulse voltages 0.45v to 2.4v input and output timing ref. voltages 0.8v to 2.0v ac measurement conditions ai00828 1.3v out c l = 100pf c l includes jig capacitance 3.3k w 1n914 device under test figure 4. ac testing load circuit note that output hi-z is defined as the point where data is no longer driven. symbol parameter test condition min max unit c in input capacitance v in = 0v 6 pf c out output capacitance v out = 0v 12 pf note: 1. sampled only, not 100% tested. table 4. capacitance (1) (t a = 25 c, f = 1 mhz ) symbol parameter test condition min max unit i li input leakage current 0 v in v cc 10 m a i lo output leakage current v out = v cc , ep = v cc 10 m a i cc supply current ep = v il , g = v il 100 ma i cc1 supply current (standby) ep = v ih , g = v il 25 ma i pp program current v pp = v cc 5ma v il input low voltage C0.1 0.8 v v ih input high voltage 2 v cc + 1 v v ol output low voltage i ol = 2.1ma 0.45 v v oh output high voltage i oh = C400 m a 2.4 v note: 1. v cc must be applied simultaneously with or before v pp and removed simultaneously or af ter v pp . table 5. read mode dc characteristics (1) (t a = 0 to 70 c or C40 to 85 c; v cc = 5v 5% or 5v 10%; v pp = v cc ) M2716 4/9
ai00786 taxqx tehqz data out a0-a10 ep g q0-q7 tavqv tghqz tglqv telqv valid hi-z figure 5. read mode ac waveforms symbol alt parameter test condition M2716 unit -1 blank min max min max t avqv t acc address valid to output valid ep = v il , g = v il 350 450 ns t elqv t ce chip enable low to output valid g = v il 350 450 ns t glqv t oe output enable low to output valid ep = v il 120 120 ns t ehqz (2) t od chip enable high to output hi-z g = v il 0 100 0 100 ns t ghqz (2) t df output enable high to output hi-z ep = v il 0 100 0 100 ns t axqx t oh address transition to output transition ep = v il , g = v il 00ns notes: 1. v cc must be applied simultaneously with or before v pp and removed simultaneously or af ter v pp . 2. sampled only, not 100% tested. table 6. read mode ac characteristics (1) (t a = 0 to 70 c or C40 to 85 c; v cc = 5v 5% or 5v 10%; v pp = v cc ) symbol parameter test condition min max unit i li input leakage current v il v in v ih 10 m a i cc supply current 100 ma i pp program current 5 ma i pp1 program current pulse ep = v ih pulse 30 ma v il input low voltage C0.1 0.8 v v ih input high voltage 2 v cc + 1 v note: 1. v cc must be applied simultaneously with or before v pp and removed simultaneously or af ter v pp . table 7. programming mode dc characteristics (1) (t a = 25 c; v cc = 5v 5%; v pp = 25v 1v) M2716 5/9
symbol alt parameter test condition min max units t avph t as address valid to program high g = v ih 2 m s t qvph t ds input valid to program high g = v ih 2 m s t ghph t os output enable high to program high 2 m s t pl1pl2 t pr program pulse rise time 5 ns t ph1ph2 t pf program pulse fall time 5 ns t phpl t pw program pulse width 45 55 ms t plqx t dh program low to input transition 2 m s t plgx t oh program low to output enable transition 2 m s t glqv t oe output enable to output valid ep = v il 120 ns t ghqz t df output enable high to output hi-z 0 100 ns t plax t ah program low to address transition 2 m s notes: 1. v cc must be applied simultaneously with or before v pp and removed simultaneously or after v pp . 2. sampled only, not 100% tested. table 8. programming mode ac characteristics (1) (t a = 25 c; v cc = 5v 5%; v pp = 25v 1v) ai00787 tglqv program data in a0-a10 ep g q0-q7 data out tavph tqvph tghph tplqx tplgx tphpl tplax tghqz verify valid figure 6. programming and verify modes ac waveforms M2716 6/9
7/9 M2716 ordering information scheme for a list of available options (speed, package, etc...) or for further information on any aspect of this de- vice, please contact the st sales office nearest to you. example: M2716 -1 f 1 device type M2716 = nmos 16 kbit (2kb x 8) uv eprom speed and v cc tolerance -1 = 350 ns, 5v 10% blank = 450 ns, 5v 5% package f = fdip24w temperature range 1 = C0 to 70 c 6 = C40 to 85 c
fdipw-a a2 a1 a l b1 b e1 d s e1 e n 1 c a ea e3 ? symb mm inches typ min max typ min max a 5.71 0.225 a1 0.50 1.78 0.020 0.070 a2 3.90 5.08 0.154 0.200 b 0.40 0.55 0.016 0.022 b1 1.17 1.42 0.046 0.056 c 0.22 0.31 0.009 0.012 d 32.30 1.272 e 15.40 15.80 0.606 0.622 e1 13.05 13.36 0.514 0.526 e1 2.54 C C 0.100 C C e3 27.94 C C 1.100 C C ea 16.17 18.32 0.637 0.721 l 3.18 4.10 0.125 0.161 s 1.52 2.49 0.060 0.098 ? 7.11 C C 0.280 C C a 4 15 4 15 n24 24 draw ing is not to scale fdip24w - 24 pin ceramic frit-seal dip, with window M2716 8/9
9/9 M2716 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the co nsequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publicati on are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics prod ucts are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectro nics. the st logo is registered trademark of stmicroelectronics ? 2000 stmicroelectronics - all rights reserved all other names are the property of their respective owners. stmicroelectronics group of companies australia - brazil - china - finland - france - germany - hong kong - india - italy - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - u.s.a. http://www.st.com
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